Programmable Logic Equations
"* ATM UNI Declarations.
"******************************************************************************
"******************************************************************************
"* Reset Declarations.
"******************************************************************************
HARD_RESET_ACTIVE = 0 ;
SOFT_RESET_ACTIVE = 0 ;
HARD_RESET_ASSERTED = (SyncHardReset_B.fb == HARD_RESET_ACTIVE) ;
"******************************************************************************
"* data buffers enable.
"******************************************************************************
BUFFER_DISABLED = 1 ;
BUFFER_ENABLED = !BUFFER_DISABLED ;
BUFFER_HOLD_OFF = (HoldOffCnt.fb != 0) ; " the delay is required for read as well
" since a fast device (eg bcsr) may
" content with the flash/eeprom
END_OF_FLASH_EEPROM_READ = !DVal_B & (!Cs0_B # !Cs4_B) & !R_B_W & DSyncHardReset_B.fb ;
" end of flash/eeprom read cycle.
" not during hard reset config
END_OF_PCI_INT_CONT_READ = !DVal_B & !IntContCs_B & !R_B_W ;
" end of PCI Interrupt Controller read cycle.
END_OF_ATM_READ = !DVal_B & !AtmUniCsIn_B & !R_B_W ; " end of atm uni m/p i/f read cycle
END_OF_OTHER_CYCLE = (!DVal_B & Cs0_B & Cs4_B & AtmUniCsIn_B & IntContCs_B #
!DVal_B & !AtmUniCsIn_B & R_B_W #
!DVal_B & !ToolCs1_B & R_B_W #
!DVal_B & !ToolCs2_B & R_B_W #
!DVal_B & (!Cs0_B # !Cs4_B) & R_B_W #
!DVal_B & !IntContCs_B & R_B_W) ;
" another access or atm uni write or tool 1 write or tool 2 write or
" flash/eeprom write PCI int cont write
"******************************************************************************
"* Hard Reset Configuration Logic
"******************************************************************************
HRESET_CFG_IN_BCSR = (bcsrConfEn == 1); " HRESET Conf Word in BCSR
HRESET_BOOT_IN_FLASH = ((bcsrConfEn == 0) & (boot_device_B == 0));
" HRESET Conf Word and Boot Code in FLASH
BOOT_IN_FLASH = ((bcsrConfEn == 1) & (boot_device_B == 0));
" HRESET Conf Word in BCSR and Boot Code in FLASH
HRESET_BOOT_IN_EEPROM = ((bcsrConfEn == 0) & (boot_device_B == 1));
" HRESET Conf Word and Boot Code in EEPROM
BOOT_IN_EEPROM = ((bcsrConfEn == 1) & (boot_device_B == 1));
" HRESET Conf Word in BCSR and Boot Code in EEPROM
HARD_RESET_ASSERTION = ( (HardReset_B == 0) & (SyncHardReset_B.fb == 0) &
(DSyncHardReset_B.fb == 1) );
CS0_ASSERTED = (Cs0_B == 0);
CS4_ASSERTED = (Cs4_B == 0);
FIRST_CFG_BYTE_READ = (CS0_ASSERTED & !DSyncHardReset_B.fb & (ConfAdd == 0) &
HRESET_CFG_IN_BCSR & !R_B_W);
Chapter 8. Support
相关PDF资料
MPC8308-RDB BOARD REF DESIGN MPC8308
MPC8309-KIT KIT EVALUATION FOR MPC830X
MPC8315E-RDB PROCESSOR BOARD PWRQUICCII PBGA
MPC8349E-MITX-GP KIT REFERENCE PLATFORM MPC8349E
MPC8349E-MITXE BOARD REFERENCE FOR MPC8349
MPC8377E-MDS-PB BOARD MODULAR DEV SYSTEM
MPC8569E-MDS-PB BOARD MOD DEV SYSTEM MPC8569
MPC8572EAMC MPC8572 AMC RAPID SYSTEM
相关代理商/技术参数
MPC8272CVR 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:MPC8272 PowerQUICC II Family Hardware Specifications
MPC8272CVRB 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC II⑩ Family Hardware Specifications
MPC8272CVRE 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC II⑩ Family Hardware Specifications
MPC8272CVRI 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC II⑩ Family Hardware Specifications
MPC8272CVRM 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC II⑩ Family Hardware Specifications
MPC8272CVRMIBA 功能描述:微处理器 - MPU 266 MHz 505.4 MIPS RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
MPC8272CVRP 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC II⑩ Family Hardware Specifications
MPC8272CVRPIEA 功能描述:微处理器 - MPU 300 MHz 570 MIPS RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324